PSOC E8XXGP Device Support Library
USBHS_SS_Type Struct Reference

Description

USBHS Subsystem, Controller, PHY control,configuration and status registers (USBHS_SS)

Data Fields

__IOM uint32_t SUBSYSTEM_CTL
 
__IOM uint32_t PHY_FUNC_CTL_1
 
__IOM uint32_t PHY_FUNC_CTL_2
 
__IOM uint32_t PHY_TEST_CTL
 
__IOM uint32_t CONTROLLER_DDFT_CTL
 
__IOM uint32_t INTR_SS
 
__IOM uint32_t INTR_SS_SET
 
__IOM uint32_t INTR_SS_MASK
 
__IM uint32_t INTR_SS_MASKED
 
__IM uint32_t RESERVED [55]
 

Field Documentation

◆ SUBSYSTEM_CTL

__IOM uint32_t USBHS_SS_Type::SUBSYSTEM_CTL

0x00000000 Subsystem level control register

◆ PHY_FUNC_CTL_1

__IOM uint32_t USBHS_SS_Type::PHY_FUNC_CTL_1

0x00000004 Subsystem level- PHY functional mode control register 1

◆ PHY_FUNC_CTL_2

__IOM uint32_t USBHS_SS_Type::PHY_FUNC_CTL_2

0x00000008 Subsystem level- PHY functional mode control register 2

◆ PHY_TEST_CTL

__IOM uint32_t USBHS_SS_Type::PHY_TEST_CTL

0x0000000C Subsystem level- PHY test mode control register

◆ CONTROLLER_DDFT_CTL

__IOM uint32_t USBHS_SS_Type::CONTROLLER_DDFT_CTL

0x00000010 Subsystem level- Controller DDFT control register

◆ INTR_SS

__IOM uint32_t USBHS_SS_Type::INTR_SS

0x00000014 Subsystem level- Interrupt register

◆ INTR_SS_SET

__IOM uint32_t USBHS_SS_Type::INTR_SS_SET

0x00000018 Subsystem level- Interrupt set register

◆ INTR_SS_MASK

__IOM uint32_t USBHS_SS_Type::INTR_SS_MASK

0x0000001C Subsystem level- Interrupt mask register

◆ INTR_SS_MASKED

__IM uint32_t USBHS_SS_Type::INTR_SS_MASKED

0x00000020 Subsystem level- Interrupt masked register

◆ RESERVED

__IM uint32_t USBHS_SS_Type::RESERVED[55]