PSOC E8XXGP Device Support Library
U55_PAGE_PMU_1_0_Type Struct Reference

Description

Page PMU (U55_PAGE_PMU_1_0)

Data Fields

__IM uint32_t RESERVED [32]
 
__IOM uint32_t PMCR
 
__IOM uint32_t PMCNTENSET
 
__IOM uint32_t PMCNTENCLR
 
__IOM uint32_t PMOVSSET
 
__IOM uint32_t PMOVSCLR
 
__IOM uint32_t PMINTSET
 
__IOM uint32_t PMINTCLR
 
__IM uint32_t RESERVED1
 
__IOM uint32_t PMCCNTR_LO
 
__IOM uint32_t PMCCNTR_HI
 
__IOM uint32_t PMCCNTR_CFG
 
__IOM uint32_t PMCAXI_CHAN
 
__IM uint32_t RESERVED2 [84]
 
__OM uint32_t PMU_EVCNTR [4]
 
__IM uint32_t RESERVED3 [28]
 
__IOM uint32_t PMU_ENTYPER [4]
 
__IM uint32_t RESERVED4 [92]
 

Field Documentation

◆ RESERVED

__IM uint32_t U55_PAGE_PMU_1_0_Type::RESERVED[32]

◆ PMCR

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMCR

0x00000080 PMU master control register

◆ PMCNTENSET

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMCNTENSET

0x00000084 Count-enable set register

◆ PMCNTENCLR

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMCNTENCLR

0x00000088 Count-enable clear register

◆ PMOVSSET

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMOVSSET

0x0000008C Overflow-flag status set register

◆ PMOVSCLR

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMOVSCLR

0x00000090 Overflow-flag status clear register

◆ PMINTSET

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMINTSET

0x00000094 Interrupt-enable set register

◆ PMINTCLR

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMINTCLR

0x00000098 Interrupt-enable clear register

◆ RESERVED1

__IM uint32_t U55_PAGE_PMU_1_0_Type::RESERVED1

◆ PMCCNTR_LO

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMCCNTR_LO

0x000000A0 Performance-monitor cycle count low register

◆ PMCCNTR_HI

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMCCNTR_HI

0x000000A4 Performance-monitor cycle count high register

◆ PMCCNTR_CFG

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMCCNTR_CFG

0x000000A8 Set start/stop event on the cycle counter.

◆ PMCAXI_CHAN

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMCAXI_CHAN

0x000000AC Set which AXI channel monitor

◆ RESERVED2

__IM uint32_t U55_PAGE_PMU_1_0_Type::RESERVED2[84]

◆ PMU_EVCNTR

__OM uint32_t U55_PAGE_PMU_1_0_Type::PMU_EVCNTR[4]

0x00000200 Performance monitor event counters

◆ RESERVED3

__IM uint32_t U55_PAGE_PMU_1_0_Type::RESERVED3[28]

◆ PMU_ENTYPER

__IOM uint32_t U55_PAGE_PMU_1_0_Type::PMU_ENTYPER[4]

0x00000280 Performance monitor event type control counters

◆ RESERVED4

__IM uint32_t U55_PAGE_PMU_1_0_Type::RESERVED4[92]