TDM TX structure (TDM_TDM_STRUCT_TDM_TX_STRUCT)
Data Fields | |
| __IOM uint32_t | TX_CTL |
| __IM uint32_t | RESERVED [3] |
| __IOM uint32_t | TX_IF_CTL |
| __IOM uint32_t | TX_CH_CTL |
| __IM uint32_t | RESERVED1 [2] |
| __IOM uint32_t | TX_TEST_CTL |
| __IOM uint32_t | TX_ROUTE_CTL |
| __IM uint32_t | RESERVED2 [22] |
| __IOM uint32_t | TX_FIFO_CTL |
| __IM uint32_t | TX_FIFO_STATUS |
| __OM uint32_t | TX_FIFO_WR |
| __IM uint32_t | RESERVED3 [13] |
| __IOM uint32_t | INTR_TX |
| __IOM uint32_t | INTR_TX_SET |
| __IOM uint32_t | INTR_TX_MASK |
| __IM uint32_t | INTR_TX_MASKED |
| __IM uint32_t | RESERVED4 [12] |
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::TX_CTL |
0x00000000 TX control
| __IM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::RESERVED[3] |
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::TX_IF_CTL |
0x00000010 TX interface control
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::TX_CH_CTL |
0x00000014 TX channel control
| __IM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::RESERVED1[2] |
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::TX_TEST_CTL |
0x00000020 TX test control
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::TX_ROUTE_CTL |
0x00000024 TX route control
| __IM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::RESERVED2[22] |
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::TX_FIFO_CTL |
0x00000080 TX FIFO control
| __IM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::TX_FIFO_STATUS |
0x00000084 TX FIFO status
| __OM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::TX_FIFO_WR |
0x00000088 TX FIFO write
| __IM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::RESERVED3[13] |
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::INTR_TX |
0x000000C0 Interrupt
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::INTR_TX_SET |
0x000000C4 Interrupt set
| __IOM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::INTR_TX_MASK |
0x000000C8 Interrupt mask
| __IM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::INTR_TX_MASKED |
0x000000CC Interrupt masked
| __IM uint32_t TDM_TDM_STRUCT_TDM_TX_STRUCT_Type::RESERVED4[12] |