Description

TDM RX structure (TDM_TDM_STRUCT_TDM_RX_STRUCT)

Data Fields
__IOM uint32_t	RX_CTL

__IM uint32_t	RESERVED [3]

__IOM uint32_t	RX_IF_CTL

__IOM uint32_t	RX_CH_CTL

__IM uint32_t	RESERVED1 [2]

__IOM uint32_t	RX_TEST_CTL

__IOM uint32_t	RX_ROUTE_CTL

__IM uint32_t	RESERVED2 [22]

__IOM uint32_t	RX_FIFO_CTL

__IM uint32_t	RX_FIFO_STATUS

__IM uint32_t	RX_FIFO_RD

__IM uint32_t	RX_FIFO_RD_SILENT

__IM uint32_t	RESERVED3 [12]

__IOM uint32_t	INTR_RX

__IOM uint32_t	INTR_RX_SET

__IOM uint32_t	INTR_RX_MASK

__IM uint32_t	INTR_RX_MASKED

__IM uint32_t	RESERVED4 [12]

Field Documentation

◆ RX_CTL

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_CTL

0x00000000 RX control

◆ RESERVED

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RESERVED[3]

◆ RX_IF_CTL

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_IF_CTL

0x00000010 RX interface control

◆ RX_CH_CTL

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_CH_CTL

0x00000014 RX channel control

◆ RESERVED1

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RESERVED1[2]

◆ RX_TEST_CTL

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_TEST_CTL

0x00000020 RX test control

◆ RX_ROUTE_CTL

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_ROUTE_CTL

0x00000024 RX route control

◆ RESERVED2

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RESERVED2[22]

◆ RX_FIFO_CTL

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_FIFO_CTL

0x00000080 RX FIFO control

◆ RX_FIFO_STATUS

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_FIFO_STATUS

0x00000084 RX FIFO status

◆ RX_FIFO_RD

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_FIFO_RD

0x00000088 RX FIFO read

◆ RX_FIFO_RD_SILENT

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RX_FIFO_RD_SILENT

0x0000008C RX FIFO silent read

◆ RESERVED3

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RESERVED3[12]

◆ INTR_RX

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::INTR_RX

0x000000C0 Interrupt

◆ INTR_RX_SET

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::INTR_RX_SET

0x000000C4 Interrupt set

◆ INTR_RX_MASK

__IOM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::INTR_RX_MASK

0x000000C8 Interrupt mask

◆ INTR_RX_MASKED

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::INTR_RX_MASKED

0x000000CC Interrupt masked

◆ RESERVED4

__IM uint32_t TDM_TDM_STRUCT_TDM_RX_STRUCT_Type::RESERVED4[12]