SMIF_CORE_SMIF_HSIOM_Type Struct Reference

Description

IO Matrix (IOM) (SMIF_CORE_SMIF_HSIOM)

Data Fields
SMIF_CORE_SMIF_HSIOM_SMIF_PRT_Type	SMIF_PRT [3]
__IM uint32_t	RESERVED [1012]
SMIF_CORE_SMIF_HSIOM_SMIF_SECURE_PRT_Type	SMIF_SECURE_PRT [3]
__IM uint32_t	RESERVED1 [1012]
__IOM uint32_t	AMUX_SPLIT_CTL [64]
__IM uint32_t	RESERVED2 [64]
__IOM uint32_t	MONITOR_CTL_0
__IOM uint32_t	MONITOR_CTL_1
__IOM uint32_t	MONITOR_CTL_2
__IOM uint32_t	MONITOR_CTL_3
__IM uint32_t	RESERVED3 [1916]

Field Documentation

SMIF_PRT

SMIF_CORE_SMIF_HSIOM_SMIF_PRT_Type SMIF_CORE_SMIF_HSIOM_Type::SMIF_PRT[3]

0x00000000 HSIOM port registers

RESERVED

__IM uint32_t SMIF_CORE_SMIF_HSIOM_Type::RESERVED[1012]

SMIF_SECURE_PRT

SMIF_CORE_SMIF_HSIOM_SMIF_SECURE_PRT_Type SMIF_CORE_SMIF_HSIOM_Type::SMIF_SECURE_PRT[3]

0x00001000 HSIOM secure attribute port registers

RESERVED1

__IM uint32_t SMIF_CORE_SMIF_HSIOM_Type::RESERVED1[1012]

AMUX_SPLIT_CTL

__IOM uint32_t SMIF_CORE_SMIF_HSIOM_Type::AMUX_SPLIT_CTL[64]

0x00002000 AMUX splitter cell control

RESERVED2

__IM uint32_t SMIF_CORE_SMIF_HSIOM_Type::RESERVED2[64]

MONITOR_CTL_0

__IOM uint32_t SMIF_CORE_SMIF_HSIOM_Type::MONITOR_CTL_0

0x00002200 Power/Ground Monitor cell control 0

MONITOR_CTL_1

__IOM uint32_t SMIF_CORE_SMIF_HSIOM_Type::MONITOR_CTL_1

0x00002204 Power/Ground Monitor cell control 1

MONITOR_CTL_2

__IOM uint32_t SMIF_CORE_SMIF_HSIOM_Type::MONITOR_CTL_2

0x00002208 Power/Ground Monitor cell control 2

MONITOR_CTL_3

__IOM uint32_t SMIF_CORE_SMIF_HSIOM_Type::MONITOR_CTL_3

0x0000220C Power/Ground Monitor cell control 3

RESERVED3

__IM uint32_t SMIF_CORE_SMIF_HSIOM_Type::RESERVED3[1916]