Description

IO port control/configuration (SMIF_CORE_SMIF_GPIO)

Data Fields
SMIF_CORE_SMIF_GPIO_SMIF_PRT_Type	SMIF_PRT [3]

__IM uint32_t	RESERVED [7072]

__IM uint32_t	SEC_INTR_CAUSE0

__IM uint32_t	SEC_INTR_CAUSE1

__IM uint32_t	SEC_INTR_CAUSE2

__IM uint32_t	SEC_INTR_CAUSE3

__IM uint32_t	RESERVED1 [1020]

__IM uint32_t	INTR_CAUSE0

__IM uint32_t	INTR_CAUSE1

__IM uint32_t	INTR_CAUSE2

__IM uint32_t	INTR_CAUSE3

__IM uint32_t	VDD_ACTIVE

__IOM uint32_t	VDD_INTR

__IOM uint32_t	VDD_INTR_MASK

__IM uint32_t	VDD_INTR_MASKED

__IOM uint32_t	VDD_INTR_SET

__IM uint32_t	VDD_PWRSW_STATUS

__IM uint32_t	RESERVED2 [54]

__IOM uint32_t	VDD_PWRSW_CTL

__IM uint32_t	RESERVED3 [8127]

Field Documentation

◆ SMIF_PRT

SMIF_CORE_SMIF_GPIO_SMIF_PRT_Type SMIF_CORE_SMIF_GPIO_Type::SMIF_PRT[3]

0x00000000 GPIO port registers

◆ RESERVED

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::RESERVED[7072]

◆ SEC_INTR_CAUSE0

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::SEC_INTR_CAUSE0

0x00007000 Secure Interrupt port cause register 0

◆ SEC_INTR_CAUSE1

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::SEC_INTR_CAUSE1

0x00007004 Secure Interrupt port cause register 1

◆ SEC_INTR_CAUSE2

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::SEC_INTR_CAUSE2

0x00007008 Secure Interrupt port cause register 2

◆ SEC_INTR_CAUSE3

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::SEC_INTR_CAUSE3

0x0000700C Secure Interrupt port cause register 3

◆ RESERVED1

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::RESERVED1[1020]

◆ INTR_CAUSE0

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::INTR_CAUSE0

0x00008000 Interrupt port cause register 0

◆ INTR_CAUSE1

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::INTR_CAUSE1

0x00008004 Interrupt port cause register 1

◆ INTR_CAUSE2

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::INTR_CAUSE2

0x00008008 Interrupt port cause register 2

◆ INTR_CAUSE3

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::INTR_CAUSE3

0x0000800C Interrupt port cause register 3

◆ VDD_ACTIVE

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::VDD_ACTIVE

0x00008010 Extern power supply detection register

◆ VDD_INTR

__IOM uint32_t SMIF_CORE_SMIF_GPIO_Type::VDD_INTR

0x00008014 Supply detection interrupt register

◆ VDD_INTR_MASK

__IOM uint32_t SMIF_CORE_SMIF_GPIO_Type::VDD_INTR_MASK

0x00008018 Supply detection interrupt mask register

◆ VDD_INTR_MASKED

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::VDD_INTR_MASKED

0x0000801C Supply detection interrupt masked register

◆ VDD_INTR_SET

__IOM uint32_t SMIF_CORE_SMIF_GPIO_Type::VDD_INTR_SET

0x00008020 Supply detection interrupt set register

◆ VDD_PWRSW_STATUS

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::VDD_PWRSW_STATUS

0x00008024 Power switch status

◆ RESERVED2

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::RESERVED2[54]

◆ VDD_PWRSW_CTL

__IOM uint32_t SMIF_CORE_SMIF_GPIO_Type::VDD_PWRSW_CTL

0x00008100 Power Switch control

◆ RESERVED3

__IM uint32_t SMIF_CORE_SMIF_GPIO_Type::RESERVED3[8127]