PSOC E8XXGP Device Support Library
MCWDT_Type Struct Reference

Description

Multi-Counter Watchdog Timer (Type B) (MCWDT)

Data Fields

MCWDT_CTR_Type CTR [2]
 
__IOM uint32_t CPU_SELECT
 
__IM uint32_t RESERVED [15]
 
__IOM uint32_t CTR2_CTL
 
__IOM uint32_t CTR2_CONFIG
 
__IOM uint32_t CTR2_CNT
 
__IM uint32_t RESERVED1
 
__IOM uint32_t LOCK
 
__IOM uint32_t SERVICE
 
__IM uint32_t RESERVED2 [2]
 
__IOM uint32_t INTR
 
__IOM uint32_t INTR_SET
 
__IOM uint32_t INTR_MASK
 
__IM uint32_t INTR_MASKED
 
__IM uint32_t RESERVED3 [20]
 

Field Documentation

◆ CTR

MCWDT_CTR_Type MCWDT_Type::CTR[2]

0x00000000 MCWDT Configuration for Subcounter 0 and 1

◆ CPU_SELECT

__IOM uint32_t MCWDT_Type::CPU_SELECT

0x00000040 MCWDT CPU selection register

◆ RESERVED

__IM uint32_t MCWDT_Type::RESERVED[15]

◆ CTR2_CTL

__IOM uint32_t MCWDT_Type::CTR2_CTL

0x00000080 MCWDT Subcounter 2 Control register

◆ CTR2_CONFIG

__IOM uint32_t MCWDT_Type::CTR2_CONFIG

0x00000084 MCWDT Subcounter 2 Configuration register

◆ CTR2_CNT

__IOM uint32_t MCWDT_Type::CTR2_CNT

0x00000088 MCWDT Subcounter 2 Count Register

◆ RESERVED1

__IM uint32_t MCWDT_Type::RESERVED1

◆ LOCK

__IOM uint32_t MCWDT_Type::LOCK

0x00000090 MCWDT Lock Register

◆ SERVICE

__IOM uint32_t MCWDT_Type::SERVICE

0x00000094 MCWDT Service Register

◆ RESERVED2

__IM uint32_t MCWDT_Type::RESERVED2[2]

◆ INTR

__IOM uint32_t MCWDT_Type::INTR

0x000000A0 MCWDT Interrupt Register

◆ INTR_SET

__IOM uint32_t MCWDT_Type::INTR_SET

0x000000A4 MCWDT Interrupt Set Register

◆ INTR_MASK

__IOM uint32_t MCWDT_Type::INTR_MASK

0x000000A8 MCWDT Interrupt Mask Register

◆ INTR_MASKED

__IM uint32_t MCWDT_Type::INTR_MASKED

0x000000AC MCWDT Interrupt Masked Register

◆ RESERVED3

__IM uint32_t MCWDT_Type::RESERVED3[20]