PSOC E8XXGP Device Support Library
MCWDT_CTR_Type Struct Reference

Description

MCWDT Configuration for Subcounter 0 and 1 (MCWDT_CTR)

Data Fields

__IOM uint32_t CTL
 
__IOM uint32_t LOWER_LIMIT
 
__IOM uint32_t UPPER_LIMIT
 
__IOM uint32_t WARN_LIMIT
 
__IOM uint32_t CONFIG
 
__IOM uint32_t CNT
 
__IM uint32_t RESERVED [2]
 

Field Documentation

◆ CTL

__IOM uint32_t MCWDT_CTR_Type::CTL

0x00000000 MCWDT Subcounter Control Register

◆ LOWER_LIMIT

__IOM uint32_t MCWDT_CTR_Type::LOWER_LIMIT

0x00000004 MCWDT Subcounter Lower Limit Register

◆ UPPER_LIMIT

__IOM uint32_t MCWDT_CTR_Type::UPPER_LIMIT

0x00000008 MCWDT Subcounter Upper Limit Register

◆ WARN_LIMIT

__IOM uint32_t MCWDT_CTR_Type::WARN_LIMIT

0x0000000C MCWDT Subcounter Warn Limit Register

◆ CONFIG

__IOM uint32_t MCWDT_CTR_Type::CONFIG

0x00000010 MCWDT Subcounter Configuration Register

◆ CNT

__IOM uint32_t MCWDT_CTR_Type::CNT

0x00000014 MCWDT Subcounter Count Register

◆ RESERVED

__IM uint32_t MCWDT_CTR_Type::RESERVED[2]