Description

LPPASS top-level MMIO (LPPASS_MMIO)

Data Fields
__IM uint32_t	INTR_CAUSE

__IM uint32_t	FIFO_INTR_CAUSE

__IM uint32_t	RESERVED [2]

__IOM uint32_t	TR_OUT [8]

__IM uint32_t	RESERVED1 [4]

__IOM uint32_t	INTR

__IM uint32_t	RESERVED2

__IOM uint32_t	INTR_SET

__IM uint32_t	RESERVED3

__IOM uint32_t	INTR_MASK

__IM uint32_t	RESERVED4

__IM uint32_t	INTR_MASKED

__IM uint32_t	RESERVED5

__IOM uint32_t	FIFO_INTR

__IM uint32_t	RESERVED6

__IOM uint32_t	FIFO_INTR_SET

__IM uint32_t	RESERVED7

__IOM uint32_t	FIFO_INTR_MASK

__IM uint32_t	RESERVED8

__IM uint32_t	FIFO_INTR_MASKED

__IM uint32_t	RESERVED9 [225]

LPPASS_MMIO_STA_Type	STA

Field Documentation

◆ INTR_CAUSE

__IM uint32_t LPPASS_MMIO_Type::INTR_CAUSE

0x00000000 Interrupt cause register

◆ FIFO_INTR_CAUSE

__IM uint32_t LPPASS_MMIO_Type::FIFO_INTR_CAUSE

0x00000004 FIFO Interrupt cause register

◆ RESERVED

__IM uint32_t LPPASS_MMIO_Type::RESERVED[2]

◆ TR_OUT

__IOM uint32_t LPPASS_MMIO_Type::TR_OUT[8]

0x00000010 Trigger out select register

◆ RESERVED1

__IM uint32_t LPPASS_MMIO_Type::RESERVED1[4]

◆ INTR

__IOM uint32_t LPPASS_MMIO_Type::INTR

0x00000040 Interrupt request register

◆ RESERVED2

__IM uint32_t LPPASS_MMIO_Type::RESERVED2

◆ INTR_SET

__IOM uint32_t LPPASS_MMIO_Type::INTR_SET

0x00000048 Interrupt request set register

◆ RESERVED3

__IM uint32_t LPPASS_MMIO_Type::RESERVED3

◆ INTR_MASK

__IOM uint32_t LPPASS_MMIO_Type::INTR_MASK

0x00000050 Interrupt request mask

◆ RESERVED4

__IM uint32_t LPPASS_MMIO_Type::RESERVED4

◆ INTR_MASKED

__IM uint32_t LPPASS_MMIO_Type::INTR_MASKED

0x00000058 Interrupt request masked

◆ RESERVED5

__IM uint32_t LPPASS_MMIO_Type::RESERVED5

◆ FIFO_INTR

__IOM uint32_t LPPASS_MMIO_Type::FIFO_INTR

0x00000060 FIFO Interrupt request register

◆ RESERVED6

__IM uint32_t LPPASS_MMIO_Type::RESERVED6

◆ FIFO_INTR_SET

__IOM uint32_t LPPASS_MMIO_Type::FIFO_INTR_SET

0x00000068 FIFO Interrupt set request register

◆ RESERVED7

__IM uint32_t LPPASS_MMIO_Type::RESERVED7

◆ FIFO_INTR_MASK

__IOM uint32_t LPPASS_MMIO_Type::FIFO_INTR_MASK

0x00000070 FIFO Interrupt mask register

◆ RESERVED8

__IM uint32_t LPPASS_MMIO_Type::RESERVED8

◆ FIFO_INTR_MASKED

__IM uint32_t LPPASS_MMIO_Type::FIFO_INTR_MASKED

0x00000078 FIFO Interrupt masked request register

◆ RESERVED9

__IM uint32_t LPPASS_MMIO_Type::RESERVED9[225]

◆ STA

LPPASS_MMIO_STA_Type LPPASS_MMIO_Type::STA

0x00000400 FIFO Static configuration