Description

Autonomnous Controller (ACTRLR)

Data Fields
__IOM uint32_t	CTRL

__IOM uint32_t	CMD_RUN

__IOM uint32_t	CMD_STATE

__IM uint32_t	RESERVED

__IOM uint32_t	FW_TR [4]

__IM uint32_t	STATUS

__IOM uint32_t	CFG

__IM uint32_t	RESERVED1 [2]

__IOM uint32_t	DEBUG_PAUSE

__IOM uint32_t	DEBUG_SINGLE_STEP

__IM uint32_t	PWR_STATUS

__IM uint32_t	RESERVED2 [49]

__IM uint32_t	CNTR_STATUS [4]

__IM uint32_t	RESERVED3 [444]

ACTRLR_TTCFG_Type	TTCFG [64]

Field Documentation

◆ CTRL

__IOM uint32_t ACTRLR_Type::CTRL

0x00000000 control register

◆ CMD_RUN

__IOM uint32_t ACTRLR_Type::CMD_RUN

0x00000004 run command register

◆ CMD_STATE

__IOM uint32_t ACTRLR_Type::CMD_STATE

0x00000008 state override register

◆ RESERVED

__IM uint32_t ACTRLR_Type::RESERVED

◆ FW_TR

__IOM uint32_t ACTRLR_Type::FW_TR[4]

0x00000010 firmware trigger

◆ STATUS

__IM uint32_t ACTRLR_Type::STATUS

0x00000020 status register

◆ CFG

__IOM uint32_t ACTRLR_Type::CFG

0x00000024 config register (only accessible if CTRL.EN=0)

◆ RESERVED1

__IM uint32_t ACTRLR_Type::RESERVED1[2]

◆ DEBUG_PAUSE

__IOM uint32_t ACTRLR_Type::DEBUG_PAUSE

0x00000030 pause debug register

◆ DEBUG_SINGLE_STEP

__IOM uint32_t ACTRLR_Type::DEBUG_SINGLE_STEP

0x00000034 single step debug register

◆ PWR_STATUS

__IM uint32_t ACTRLR_Type::PWR_STATUS

0x00000038 power status register

◆ RESERVED2

__IM uint32_t ACTRLR_Type::RESERVED2[49]

◆ CNTR_STATUS

__IM uint32_t ACTRLR_Type::CNTR_STATUS[4]

0x00000100 Loop/Interval counter status register

◆ RESERVED3

__IM uint32_t ACTRLR_Type::RESERVED3[444]

◆ TTCFG

ACTRLR_TTCFG_Type ACTRLR_Type::TTCFG[64]

0x00000800 Timer Table Structure (only accessible if CTRL.EN=0)